1//===- ARMTargetStreamer.cpp - ARMTargetStreamer class --*- C++ -*---------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the ARMTargetStreamer class.
11//
12//===----------------------------------------------------------------------===//
13#include "llvm/ADT/MapVector.h"
14#include "llvm/MC/ConstantPools.h"
15#include "llvm/MC/MCContext.h"
16#include "llvm/MC/MCExpr.h"
17#include "llvm/MC/MCStreamer.h"
18
19using namespace llvm;
20//
21// ARMTargetStreamer Implemenation
22//
23ARMTargetStreamer::ARMTargetStreamer(MCStreamer &S)
24    : MCTargetStreamer(S), ConstantPools(new AssemblerConstantPools()) {}
25
26ARMTargetStreamer::~ARMTargetStreamer() {}
27
28// The constant pool handling is shared by all ARMTargetStreamer
29// implementations.
30const MCExpr *ARMTargetStreamer::addConstantPoolEntry(const MCExpr *Expr) {
31  return ConstantPools->addEntry(Streamer, Expr, 4);
32}
33
34void ARMTargetStreamer::emitCurrentConstantPool() {
35  ConstantPools->emitForCurrentSection(Streamer);
36}
37
38// finish() - write out any non-empty assembler constant pools.
39void ARMTargetStreamer::finish() { ConstantPools->emitAll(Streamer); }
40
41// The remaining callbacks should be handled separately by each
42// streamer.
43void ARMTargetStreamer::emitFnStart() {}
44void ARMTargetStreamer::emitFnEnd() {}
45void ARMTargetStreamer::emitCantUnwind() {}
46void ARMTargetStreamer::emitPersonality(const MCSymbol *Personality) {}
47void ARMTargetStreamer::emitPersonalityIndex(unsigned Index) {}
48void ARMTargetStreamer::emitHandlerData() {}
49void ARMTargetStreamer::emitSetFP(unsigned FpReg, unsigned SpReg,
50                                  int64_t Offset) {}
51void ARMTargetStreamer::emitMovSP(unsigned Reg, int64_t Offset) {}
52void ARMTargetStreamer::emitPad(int64_t Offset) {}
53void ARMTargetStreamer::emitRegSave(const SmallVectorImpl<unsigned> &RegList,
54                                    bool isVector) {}
55void ARMTargetStreamer::emitUnwindRaw(int64_t StackOffset,
56                                      const SmallVectorImpl<uint8_t> &Opcodes) {
57}
58void ARMTargetStreamer::switchVendor(StringRef Vendor) {}
59void ARMTargetStreamer::emitAttribute(unsigned Attribute, unsigned Value) {}
60void ARMTargetStreamer::emitTextAttribute(unsigned Attribute,
61                                          StringRef String) {}
62void ARMTargetStreamer::emitIntTextAttribute(unsigned Attribute,
63                                             unsigned IntValue,
64                                             StringRef StringValue) {}
65void ARMTargetStreamer::emitArch(unsigned Arch) {}
66void ARMTargetStreamer::emitObjectArch(unsigned Arch) {}
67void ARMTargetStreamer::emitFPU(unsigned FPU) {}
68void ARMTargetStreamer::finishAttributeSection() {}
69void ARMTargetStreamer::emitInst(uint32_t Inst, char Suffix) {}
70void
71ARMTargetStreamer::AnnotateTLSDescriptorSequence(const MCSymbolRefExpr *SRE) {}
72
73void ARMTargetStreamer::emitThumbSet(MCSymbol *Symbol, const MCExpr *Value) {}
74